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Дополнительная опция ЦАП The Bryston DAC chip we use is a hybrid multi-bit delta sigma DAC (digital to analogue converter) device. Before the digital data reaches the delta-sigma modulator, it is run through an 8x over-sampling process and digital interpolation filter. Due to the inherent over-sampling process of a delta- sigma modulator architecture, the overall interpolation ratio of the device is 128 times. Over-sampling and up-sampling have some great benefits when implemented correctly. There is a significant difference between up-sampling and oversampling. Over-sampling is when the samples are repeated (2x, 4x, 8x, etc.) to create a new sampling frequency. The new samples are then generally run through an interpolation filter to create a more analog-like waveform. Up-sampling usually refers to a mathematical process in which the new sample rate is not a multiple of the old sample rate, and the numbers have to be calculated in real-time. This is what is happening when a sample rate converter chip is in an up-convert mode. So in the BP-26 DA, if a 44.1 kHz signal is present: we up-sample to 96kHz (with the Sample Rate Converter) and then the DAC will internally 8x over-sample that signal. The great benefit of both of these methods is that it relaxes the requirements of the analog filter after the DAC.This is important because it allows designers to implement higher cutoff frequencies with slower roll-offs, which results in a phase linear circuit in the audio band. The up-sampling method, when implemented correctly, also has the side effect of jitter reduction, since the output clock is usually asynchronous from the input clock. Another thing to note is that if the over-sampling or up-sampling processes are implemented poorly, they can actually introduce jitter. This is usually a result of poor power supply implementation. So, in the Bryston DAC, each stage in the digital chain (input receiver > sample rate converter > digital audio converter) is independently regulated to prevent

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